1. Field of the Invention
The invention relates to monolithic semiconductor devices and somewhat more particularly to a method of producing such devices wherein zones of different conductivity are isolated from one another and IC elements are placed on such isolated zones.
2. Prior Art
German Offenlegungschrifts 2,203,183 and 2,224,634 (which respectively correspond to U.S. Pat. No. 3,648,125 and Australian Published Application No. 42,414/72 generally describe a method of fabricating a monolithic semiconductor device from a silicon body in which a surface zone thereof exhibits a first conductivity and the remainder of the body exhibits an opposing conductivity. The surface zone is covered by a Si.sub.3 N.sub.4 layer which consists of two separate areas which are utilized as an etching mask to produce an isolation groove-like cavity in the surface zone at the location between such Si.sub.3 N.sub.4 areas. Thereafter, the Si.sub.3 N.sub.4 layer is utilized as an oxidation mask to oxidize the silicon surface within the isolation groove to such an extent that a resulting SiO.sub.2 filling divides the surface zone into two separate areas which remain contiguous only via the underlying portion of the silicon body (which is of an opposing conductivity to that of the so-divided surface zone). Thereafter, a select element of a circuit is fabricated on each of such separate zone areas to complete the monolithic semiconductor device.
In many instances, the foregoing fabrication technique provides relatively satisfactory results. However, in other instances, it is apparent that the insulation between the separate surface zones is insufficient and this defect appears to be attributable to the oxidation of the groove surface, which influences the dopant concentration in the area of the underlying silicon body that borders the SiO.sub.2 produced during such oxidation. In some instances, this defect may be overcome by increasing the dopant concentration in the area of opposing conductivity and at the edges of the surface zone, or, after etching the isolation groove, by subjecting the newly uncovered silicon surface to the influence of an activator in the presence of heat, so as to create the desired conductivity in the silicon body (i.e. opposite to the conductivity of the surface zone thereof). However, such remedial procedures often fail, particularly if the surface zone is n-conductive and the remainder of the silicon body is p-conductive because the doping, which must occur, then effects the entire silicon surface in the isolation groove and tends to extend into both areas of the so-divided surface zone. This is particularly detrimental in instances where the so-divided surface zone areas (with the exception of the insulating SiO.sub.2 layer therebetween) are utilized within an electrical circuit such as an integrated circuit.